VHSIC Description Language (VHDL) is outlined. VHDL is a proper notation meant to be used in all stages of the production of digital platforms. since it is either computing device readable and human readable, it helps the advance, verification, synthesis, and checking out of designs; the verbal exchange of layout facts; and the upkeep, amendment, and procurement of undefined. Its basic audiences are the implementors of instruments helping the language and the complicated clients of the language.
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Extra info for 1076-2000 IEEE Standard VHDL Language Reference Manual
2). A design is erroneous if the execution of such an operation cannot deliver the correct result (that is, if the value corresponding to the mathematical result is not a value of the ﬂoating point type). An implementation may restrict the bounds of the range constraint of ﬂoating point types other than type universal_real. 0E38 inclusive. The representation of ﬂoating point types must include a minimum of six decimal digits of precision. NOTE—An implementation is not required to detect errors in the execution of a predeﬁned ﬂoating point arithmetic operation, since the detection of overﬂow conditions resulting from such operations may not be easily accomplished on many host systems.
24 Copyright © 2000 IEEE. All rights reserved. LANGUAGE REFERENCE MANUAL 245 IEEE Std 1076, 2000 Edition 6—A subprogram containing a wait statement must not have an ancestor that is a subprogram declared within either a protected type declaration or a protected type body. 3 Subprogram overloading 250 255 Two formal parameter lists are said to have the same parameter type proﬁle if and only if they have the same number of parameters, and if at each parameter position the corresponding parameters have the same base type.
Copyright © 2000 IEEE. All rights reserved. LANGUAGE REFERENCE MANUAL — 325 IEEE Std 1076, 2000 Edition If the reserved word return is present, the subprogram is a function and the base type of the type mark following the reserved word in the signature is the same as the base type of the return type of the function, or the reserved word return is absent and the subprogram is a procedure. 1. Example: 330 attribute BuiltIn of "or" [MVL, MVL return MVL]: function is TRUE; -- Because of the presence of the signature, this attribute speciﬁcation -- decorates only the "or" function deﬁned in the previous clause.
1076-2000 IEEE Standard VHDL Language Reference Manual